In many electrical components, such as printed circuit boards, a trace or signal line is covered by one or more layers of material. For example, a signal line may be covered by a dielectric layer and a ground layer. An opening, or via, must then be created through the ground and dielectric layers in order to make electrical contact with the exposed portion of the signal line.
FIG. 1 is a cross-sectional diagram of a portion of a stripline circuit according to the prior art. The stripline circuit 100 includes a signal layer 102 with a via capture pad 104 surrounded by two dielectric layers 106, 108. Ground layers 110, 112 cover dielectric layers 106, 108, respectively. Via capture pad 104 is in contact with a trace or signal line (not shown) in signal layer 102.
A via 114 has been created through ground layer 110 and dielectric layer 106 to expose a portion of via capture pad 104. A metal 116 fills via 114 in order to create an electrical connection between via capture pad 104 and contact pad 118. Another signal line or electrical device (not shown) may be connected to contact pad 118 using a metal connector 120. Connector 120 may be configured, for example, as a solder ball, a contact pin, or a wire bond.
Via capture pad 104, metal 116, contact pad 118, and connector 120 form an interconnect between the signal line connected to via capture pad 104 and another electrical device. Unfortunately, parasitic inductance and capacitance are increased by the structure of the interconnect. Contact pad 118 adds additional parasitic capacitance while via 114 and metal 116 increase the parasitic inductance in the connection. Vias can also limit the density of a circuit when the minimum dimensions for a via capture pad 104 are larger than the minimum dimensions needed for an interconnect.